It has long been recognized that ferroelectric material exhibits a hysteresis characteristic and is capable of retaining polarization states even when power is removed from the material. Thin film and integrated circuit capacitors have been fabricated with ferroelectric material to realize the advantages of such material. Ferroelectric capacitors are fabricated by placing a layer of ferroelectric material between two conductive plates. Because the polarization states are stored or retained within the ferroelectric material itself, such states are retained even when the capacitor plates are shorted together.
As a result of the long-term retention properties of ferroelectric capacitors, such capacitors have been integrated as the storage element in semiconductor memories to render such devices nonvolatile. Nonvolatile semiconductor ferroelectric memories can be written with one or the other of a polarization state, and such polarization state is not dissipated or destroyed when the DC voltage or power is removed from the memory. The ferroelectric type of memory thus presents a decided advantage over the conventional dynamic random access memory (DRAM) and the static random access memory (SRAM) which require the presence of a supply voltage to maintain the integrity of the data stored within such type of cells. Although the DRAM and SRAM type of memories can be backed up with a battery as an alternative source of supply voltage, such a combination requires additional space and is economically advantageous in only certain applications.
Conventional ferroelectric memory circuits include a plate or drive line, a bit line, and a number of memory cells comprising a capacitor and a transistor connected between the drive line and the bit line. A particular memory cell is accessed by driving one of the transistors with a selected word line signal, and then driving the drive line with a pulse, generally of the supply voltage magnitude. If one polarization state is stored in the capacitor, then an electrical charge of nominal magnitude is transferred from the capacitor to the bit line. On the other hand, if the ferroelectric capacitor initially stored the other polarization state, a substantially larger electrical charge is transferred to the bit line. Sense amplifier circuits are utilized to sense the bit line voltage, and thus the amount of charge transferred thereto during the read operation, and thereby determine the polarization state initially stored in the ferroelectric capacitor. The smaller amount of charge transferred from the ferroelectric capacitor during the read operation to the bit line does not involve a change in the polarization state of the capacitor itself. Hence, the reading of the ferroelectric capacitor in this state is nondestructive. However, when the read operation of a ferroelectric capacitor is accompanied by the substantially larger transfer of electrical charge to the bit line, the ferroelectric capacitor changes state from the one polarization polarity to the other. In order to circumvent this polarization change, the conventional memory circuits normally include a restore cycle for restoring the original polarization state due to the destructive readout.
Although ferroelectric memory devices are characterized as being nonvolatile, and the destructive read operations can be corrected by simple and often noncomplicated restore circuits, such devices are yet susceptible to problems which cannot be corrected. For example, should the power fail or be removed from a conventional ferroelectric memory device during an on-going read operation in which the polarization states change, the ferroelectric capacitor may be in the incorrect state when power is again applied to the memory, thereby storing corrupted data.
As noted above, the read operation of a conventional ferroelectric memory cell often involves the transfer of a substantial electrical charge from the storage capacitor to the bit line. As a result, the timing constraints of the overall memory must be chosen to accommodate a worst case situation in which maximum electrical charge is transferred between the various circuits of the memory array. The time required for charging and discharging the memory circuits resulting from the read and write operations is obviously greater than it would otherwise be for the transferral of smaller electrical charges.
In writing conventional ferroelectric memory cells, the drive line is pulsed with a positive polarity pulse, generally of the supply voltage magnitude, irrespective of the polarization state to be written. However, a sense amplifier connected to the bit line is responsive to the writing of a logic one value or a logic zero value to thereby drive the bit line to the appropriate digital state. As a result, the proper electric field is applied between the drive line and the bit line, and thus across the ferroelectric capacitor to store the appropriate polarization state therein. Sense amplifier design is hereby made more complicated to accommodate both the bit line sensing and driving functions.
In those memory read operations which result in the changing or reversal of ferroelectric capacitor polarization states, the capacitors themselves undergo a phenomenon termed "fatigue", which reduces the life of the capacitor. As a result of fatigue, the reliabiity and life of a ferroelectric capacitor is proportional to the number of times it has been read and/or written According to current developments of ferroelectric material, such material can be read and written a combined number of times of about 10.sup.12. It would be highly advantageous therefore, if ferroelectric capacitors could be read without reversal of the polarization states.
From the foregoing, it can be seen that a need exists for a method and circuits adapted for reading ferroelectric capacitors such that the polarization states are not destroyed or switched to the other state. A related need exists for a ferroelectric memory cell structure which can be read, and which does not require a subsequent restore operation. Another need exist for a ferroelectric memory cell which can be read, and which does not substantially affect the life of the capacitor due to fatigue. Yet another need exists for a simplified technique to write a polarization state within a ferroelectric memory cell, without requiring a sense amplifier to drive a bit line to one or the other digital state.